A continuously variable single input with 16 outputs (1:16) power divider has been designed, simulated, fabricated and tested for its performance. The power divider consists of 4 attenuation stages, is made to operate at a centre frequency of 10 GHz and, according to the simulations, exhibits a power division ratio of over 80 dB. The division ratio is controlled using a variable dc power supply with a dc bias voltage ranging from 0V to 15V. Details of the design, together with the summary of its performance are given in the next sections.
The design of the power divider is based on the circuit shown in Fig. 1. In its simplified form the circuit consists of 2 3-dB couplers connected back-to-back with a variable admittance circuit represented by admittance Y connected in shunt. The variable admittance circuit is crucial for the correct performance of the power divider and, in order to provide an arbitrary power division, its admittance must be able to vary from 0 to , upon an external stimulus. The circuit realization of the admittance used in the present design is shown in Fig. 1 (b). It consists of a variable capacitor diode (varactor) and two passive components (inductors). Upon variation of dc bias voltage, the reactance of the diode varies from a very low value (close to zero Ω) to a very high value (several kΩ), necessary to channel RF power between ports 2 and 3. This divider is referred to as “one input two outputs” (1:2) variable power divider.
The designed, simulated and fabricated 1 to 2 variable power divider is shown in Fig.2.
The 1:16 power divider is created by using the 1:2 variable power divider of Fig. 2 as the basis. The designed 1 to 16 variable power divider is shown in Fig. 3.
Fig. 3 Designed 1 to 16 variable power divider, top view
The simulated response of the variable power divider is presented in tables below for each signal path. The results pertain to the frequency of operation of 10 GHz.
Table 1 – S21 – total dynamic range: 87.512 dB. 21.87 dB per stage.
|||Voltage (V)||Dynamic range (dB)||Max. power = -10.51 dB|
|PD1||-73.386 to -98.022||V1 = 15 V||24.636||V1 = 1.8 V|
|PD2||-52.401 to -73.386||V2 = 3.3 V||20.985||V2 = 15 V|
|PD4||-31.445 to -52.401||V4 = 3.3 V||20.956||V4 = 15 V|
|PD8||-10.51 to -31.445||V8 = 3.3||20.935||V8 = 15 V|
Table 2 – S17,1 – total dynamic range: 83.836 dB. 20.959 dB per stage.
|Voltage (V)||Dynamic range (dB)||Max. power = -10.869 dB|
|PD1||-73.678 to -94.705||V1 = 3.3 V||21.027||V1 = 15 V|
|PD3||-52.719 to -73.678||V3 = 3.3 V||20.959||V3 = 15 V|
|PD7||-31.796 to -52.719||V7 =3.3 V||20.923||V7 = 15 V|
|PD15||-10.869 to -31.796||V15 = 3.3 V||20.927||V15 = 15 V|
The simulated S-parameters for ports 1 and 2 over a frequency range between 9.5 GHz to 10.5 GHz are presented in Figs.
Fig. 4 Simulated S-parameters for ports 1 and 2; (a) – transmission coefficient and (b) reflection coefficient. Blue – fully OFF state and Red – fully ON state
The red curve in this figure refers to the case when all input power redirected to port 2, while the blue curve refers to the case when no power is directed toward port 3. As can be seen from this figure, the dynamic range is well over 80 dB at a frequency of 10 GHz.
Fabricated power divider
The fabricated 1 to 16 variable power divider is shown in Fig. 5. Fabrication was carried out on a FR-408 substrate with the following properties: and tan(δ) = 0.0125 at 10 GHz. The thickness of the substrate upon which the circuitry is placed is 0.2 mm (8 mil), however for rigidity, it is mounted on a thicker FR408 substrate. The height of the entire stack now stands at 0.9144 mm (36 mil).
Fig. 5 Fabricated 1 to 16 power divider; (a) full view of the board and (b) magnified view of a section of the board
The single-frequency (10 GHz) measured performance of the 1 to 16 variable power divider for ports 1 and 2 is presented in Table 3. As can be seen from these tables, the dynamic range for S21 is around 80 dB.
Table 3 – S21 – total dynamic range: 79.02 dB. 19.75 dB per stage.
|Voltage (V)||Dynamic range (dB)||Max. power = -10.35 dB|
|PD1||-89.37 dB||V1 = 4.61 V||24.636||V1 = 0.64 V|
|PD2||V2 = 1.5 V||V2 = 14.56 V|
|PD4||V4 = 3.15 V||V4 = 14.53 V|
|PD8||-10.35 dB||V8 = 0 V||V8 = 14.59 V|
|PD3||V3 = 5.55|
The measured S-parameters for ports 1 and 2 over a frequency range between 9.5 GHz to 10.5 GHz are presented in Fig. 6. As can be seen from these figures, the insertion loss in a fully on state is around -10.2 dB. The insertion loss at port 2 is fully in line with the simulations.
Lastly, it will be instructive to gauge the performance of the individual power dividers. This is done for the S21 transmission coefficient (J1 – J17, Fig. 5) in a systematic manner. First, the dc bias voltages are set for the case when the transmission coefficient is at a maximum. This case corresponds to Fig. 6. Then, in order to avoid the possibility of attenuating the signal to the level that is indistinguishable from the noise, the dc bias voltage on only one power divider at a time is changed and the dynamic range is measured. In this way, the dynamic range of each power divider can be assessed without an uncertainty of the signal level being too low for the receiver. The achieved dynamic ranges of each power divider are shown in Table 4.
Table 4 – Measured dynamic range of each stage for the transmission coefficient (J1-J17), enabled by power dividers PD1, PD2, PD4 and PD8.
|S21 max (dB)||S21 max with PDs OFF (dB)||Dynamic range (dB)||Average dynamic range (dB)|
The measured dynamic range is very close to the one predicted by the simulations – 18.27 dB vs 21.87 dB (same paths, J1-J17), which is an indication that the fabricated variable power splitter performs pretty much in line with the predictions. The difference in the dynamic range of about 3.6 dB is relatively small given the attenuation range and could well be attributed to imperfect manufacturing, unbalanced varactor diodes and possible assembly errors. The assembly errors are likely to stem from the fact that the individual components are manually soldered, inferring that small soldering imperfections are unavoidable.
Conclusion and summary
A four-stage, 1 to 16, 10 GHz variable power divider having a designed power division ratio around 90 dB has been designed, fabricated and tested.